AC63_BT_SDK/cpu/bd29/maskrom_stubs.ld
2025-02-18 15:40:42 +08:00

35 lines
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_local_irq_enable = ABSOLUTE(0x103e88);
_local_irq_disable = ABSOLUTE(0x103e8c);
/* p33_buf = ABSOLUTE(0x103e90); */
/* p33_xor_1byte = ABSOLUTE(0x103e94); */
/* p33_and_1byte = ABSOLUTE(0x103e98); */
/* p33_or_1byte = ABSOLUTE(0x103e9c); */
/* p33_tx_1byte = ABSOLUTE(0x103ea0); */
/* p33_rx_1byte = ABSOLUTE(0x103ea4); */
/* P33_CON_SET = ABSOLUTE(0x103ea8); */
memmem = ABSOLUTE(0x103fa8);
memcpy = ABSOLUTE(0x103fac);
memmove = ABSOLUTE(0x103fb0);
memcmp = ABSOLUTE(0x103fb4);
memset = ABSOLUTE(0x103fb8);
strcmp = ABSOLUTE(0x103fbc);
strcpy = ABSOLUTE(0x103fc0);
strlen = ABSOLUTE(0x103fc4);
strncmp = ABSOLUTE(0x103fc8);
strstr = ABSOLUTE(0x103fcc);
mask_init = ABSOLUTE(0x103fd0);
wdt_clr = ABSOLUTE(0x103fd4);
nvram_set_boot_state = ABSOLUTE(0x103fd8);
nvram_jumpaddr_set = ABSOLUTE(0x103fdc);
nvram_signature_set = ABSOLUTE(0x103fe0);
sfc_resume = ABSOLUTE(0x103fe8);
sfc_drop_cache = ABSOLUTE(0x103fec);
chip_crc16 = ABSOLUTE(0x103ff0);
CrcDecode = ABSOLUTE(0x103ff4);
chip_reset = ABSOLUTE(0x103ff8);
_IRQ_MEM_ADDR = ABSOLUTE(0xbf00);
_MASK_MEM_BEGIN = ABSOLUTE(0xbb00);
_MASK_MEM_SIZE = ABSOLUTE(0x3f0);
boot_arg_list = ABSOLUTE(0xbee4);
the_debug_isr = ABSOLUTE(0x100016);